Поисковый запрос: (<.>U=621.3.049.771.14-047.56<.>) |
Общее количество найденных документов : 28
Показаны документы с 1 по 28 |
1.
| Chandrakasan A. Adaptive techniques for dynamic processor optimization/A. Chandrakasan, S. Naffziger, A. Wang. - 2008
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2.
| Advances in design and specification languages for socs/ed. P. Boulet. - 2005
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3.
| Applications of specification and design languages for socs/ed. A. Vachoux. - 2006
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4.
| Building ASIPS: the mescal methodology/ed.: M. Gries, K. Keutzer. - 2005
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5.
| Hohenauer M. C compilers for asips/M. Hohenauer, R. Leupers. - 2010
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6.
| Foster H.D. Creating assertion-based IP/H. D. Foster, A. C. Krolnik. - 2008
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7.
| Orshansky M. Design for manufacturability and statistical design/M. Orshansky, D. Boning, S. R. Nassif. - 2008
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8.
| Design of systems on a chip: design and test/ed. R. Reis [et al.]. - 2006
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9.
| Lin Y.S. Essential issues in SOC design/Y. S. Lin. - 2007
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10.
| Ho T. Full-chip nanometer routing techniques/T. Ho, Y. Chang, S. Chen. - 2007
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11.
| Hardware software co-design of a multimedia soc platform/S. Chen [et al.]. - 2009
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12.
| Hardware software co-design of a multimedia SOC platform/S. Chen [et al.]. - 2009
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13.
| Interconnect-centric design for advanced soc and noc/ed. J. Nurmi [et al.]. - 2005
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14.
| Language-driven exploration and implementation of partially re-configurable ASIPs/A. Chattopadhyay [et al.]. - 2009
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15.
| Low power methodology manual/M. Keating [et al.]. - 2007
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16.
| Nam G. Modern circuit placement/G. Nam, J. Cong. - 2007
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17.
| Nanoelectronic circuit design/ed.: N. K. Jha, D. Chen. - 2011
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18.
| Singhee A. Novel algorithms for fast statistical analysis of scaled circuits/A. Singhee, R. A. Rutenbar. - 2009
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19.
| Schliebusch O. Optimized ASIP synthesis from architecture description language models/O. Schliebusch, R. Leupers, H. Meyr. - 2007
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20.
| Platform based design at the electronic system level/ed.: M. Burton, A. Morawiec. - 2006
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21.
| Madisetti V.K. A platform-centric approach to system-on-chip (SOC) design/V. K. Madisetti, C. Arpikanondt. - 2005
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22.
| Popovich M. Power distribution networks with on-chip decoupling capacitors/M. Popovich, E. G. Friedman, A. V. Mezhiba. - 2008
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23.
| Lim S.K. Practical problems in VLSI physical design automation/S. K. Lim. - 2008
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24.
| Fey G. Robustness and usability in modern design flows/G. Fey, R. Drechsler. - 2008
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25.
| Saxena P. Routing congestion in vlsi circuits: estimation and optimization/P. Saxena, S. S. Sapatnekar, R. S. Shelar. - 2007
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26.
| System level design of reconfigurable systems-on-chip/ed.: N. S. Voros, K. Masselos. - 2005
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27.
| Kourtev I.S. Timing optimization through clock skew scheduling/I. S. Kourtev, E. G. Friedman, B. Taskin. - 2009
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28.
| UML for SOC design/ed. G. Martin, W. Muller. - 2005
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